Demystifying multicore throughput metrics

Evaluating Asymmetric Multicore Systems-on-Chip using Iso-Metrics

The end of Dennard scaling has pushed power consumption into a first order concern for current systems, on par with performance. As a result, near-threshold voltage computing (NTVC) has been proposed as a potential means to tackle the limited cooling capacity of CMOS technology. Hardware operating in NTV consumes significantly less power, at the cost of lower frequency, and thus reduced perform...

Some Throughput Metrics for (SOA) Application Development

Energy and Throughput Efficient Transactional Memory for Embedded Multicore Systems

We propose a new design for an energy-efficient hardware transactional memory (HTM) system for power-aware embedded devices. Prior hardware transactional memory designs proposed a small, fully-associative transactional cache at the same level as the L1 cache. We propose an alternative design that unifies the transactional and L1 caches, and provides a small victim cache to reduce effects of cap...

Selecting Benchmarks Combinations for the Evaluation of Multicore Throughput

Most high-performance processors today are able to execute multiple threads of execution simultaneously. Threads share processor resources, like the last-level cache, which may decrease throughput in a non obvious way, depending on threads characteristics. Computer architects usually study multiprogrammed workloads by considering a set of benchmarks and some combinations of these benchmarks. Be...

Demystifying Typicality

A gas prepared in a non-equilibrium state will approach equilibrium and stay there. An influential contemporary approach to Statistical Mechanics explains this behaviour in terms of typicality. However, this explanation has been criticised as mysterious as long as no connection with the dynamics of the system is established. We take this criticism as our point of departure. Our central claim is...